Tanner_S-Edit

Features and Benefits:

•  Handles your most complex, fullcustom IC schematic capture
• Integration with T-Spice, AFS, and Eldo simulators, allowing waveform cross-probing and direct viewing of operating point simulation results in the schematic
• Export formats: SPICE, EDIF, Verilog, and VHDL
• Import formats: Native OpenAccess, EDIF, SPICE, and Verilog
• Support for inherited connections
• Cross-probe between schematic, layout, and Calibre LVS report with net/device highlighting
• Configurable schematic Electrical Rule Checks (ERC)
• Multiple-views per cell including: SPICE, schematic, Verilog, Verilog-A, and Verilog-AMS views
• Advanced array and bus support
• Integrated with Tanner L-Edit Schematic Driven Layout (SDL) module to speed the layout and ECO process
• Multiple library support with integrated library browser
• Integration with third-party revision control tools
• Fully scriptable and expandable using TCL/Tk command language
• Offers easy interoperability with third-party tools and foundry PDKs
• Platform independence on Windows or Linux
• Ease of use: intuitive and quick learning curve
• Unparalleled customer support
• Flexible licensing