Features and Benefits:
- No new Calibre licenses or tools required
- Accurate DRC and LVS signoff verification of 2.5D and 3D assemblies
- Applicable to virtually any stacked design configuration
- Ensures signoff Calibre verification while reducing time-to-tapeout Features
- Supports all types of stacked designs, including interposers, stacked memory, front-to-back TSV configurations, package-level routing, and more
- Supports multi-process configurations without the need for foundry-specific process rule files• Enables connectivity tracing of passive interposers to identify shorts or opens
- Provides system netlist generator tool for creation of assembly source netlists or full assembly extracted netlists
- Extends existing Calibre licenses
- Included in TSMC CoWoS and InFO reference flows