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The Calibre xACT platform is integrated with the Calibre nmLVS tool for complete transistor-level modeling of custom and cell-based designs. It is also integrated with a wide variety of 3rd-party design environments and formats to ensure compatibility with the design and post-layout simulation and analysis flows. The Calibre RVE™ results viewing environment makes it easy for designers to visualize parasitic results and make corrections in the layout editing environment. For users familiar with the Calibre use model, adoption and implementation are fast and simple, allowing design teams to reach the desired results quickly.

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Features and Benefits:

  • High extraction accuracy
  • Attofarad accuracy for digital, custom, analog, and memory designs
  • Advanced device modeling (including FinFET) integrated with Calibre nmLVS
  • Deterministic, repeatable results
  • Fast, scalable performance
  • 10X the performance of previous solutions handles multi-million instance designs
  • Multi-threaded, distributed processing architecture
  • Simultaneous multi-corner extraction; results match single corner runs
  • Support for digital, analog and custom designs
  • Foundry rule decks for all major manufacturers
  • Automatic optimization to the specific application
  • Process variation modeling and context-sensitive device extraction
  • Easy to use
  • Uses standard SVRF rule files and produces standard parasitic netlist formats
  • Fully interoperable with Calibre nmLVS, Calibre nmDRC, and popular design flows
  • GUI for design environments
  • speeds setup and debugging cycles
  • Low-risk investment
  • Based on proven Calibre technology
  • Best customer support in the industry